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TECHNICAL NOTE
Video/Audio Interfaces for TV and DVD Recorders
PAL Video I/O Interface
BH7624KS2
Description 2 BH7624KS2 is a PAL video signal input switch for DVD-Recorder applications. It supports I C-BUS, 75 driver, PAL control functions with fast blinking, I/O BUS port, and the control for BD3825FS audio signal system switch. A built-in scart terminal is incorporated.
Features 1) Vcc 5V Single 2) I2C-BUS control (Input switch to high impedance at power-off) 3) BD3825FS control function built-in 4) Built-in three parallel bus control terminal 5) Standby mode 6) CVBS/Y 5 inputs, 5 Bottom Clamp circuits, with Mute function 1 output 0/2dB AMP + Buffer 2 outputs 6/8dB AMP + 75 driver 1 output 0/6dB AMP + Buffer (for VPS, PDC) 7) Chroma 2 inputs, 2 BIAS circuits, with Mute function 2 outputs 6/8dB AMP + 75 driver control 3 outputs Buffer + 8 order LPF (Record) 8) Each SW independent actuation and all the SW simultaneous actuation are possible for the mute circuit, 9) Playback order LPF 6 circuits built-in 10) Record 8 order LPF 3 circuits built-in 11) Fast blanking circuit built-in 12) Function SW Input, 2 circuit built-in 13) Crosstalk -60dB Typ. 14) DG/DP 0.5%/0.5deg Typ.
Applications DVD-Recorder, STB, etc. Absolute maximum ratings (Ta=25C) Parameter Symbol Power supply voltage V Power dissipation Pd Operating temperature range Topr Storage temperature range Tstg *1 Reduced by 13 mW/ C over 25 C. Operating range (Ta=25C) Parameter Supply voltage Symbol Vcc1, Vcc2, VDD Limits 4.75 5.25 Unit V Ver.B Oct.2005
Limits 7.0 1300 *1 -25 +65 -55 +125
Unit V mW C C
Electrical characteristics (Unless otherwise specified, Vcc1, Vcc2, VDD=5V, Ta=25C) Item Whole VCC Circuit current VDD Circuit current VCC Circuit current at standby VDD Circuit current at standby SW part L1,AUX CVBS/Y For VPS,PDC 0dB Voltage gain L1,AUX CVBS/Y For VPS,PDC 6dB Voltage gain ENC CVBS,ENC Y to INPUT AD 0dB Voltage gain ENC CVBS,ENC Y to INPUT AD 2dB Voltage gain ENC CVBS,ENC Y to L1&AUX 6dB Voltage gain ENC CVBS,ENC Y to L1&AUX 8dB Voltage gain L1 C to AUX 6dB Voltage gain ENC C to AUX 6dB Voltage gain ENC C to AUX 8dB Voltage gain ENC C to L1 6dB Voltage gain ENC C to L1 8dB Voltage gain ENC R,G,B to L1 6dB Voltage gain ENC R,G,B to L1 8dB Voltage gain AUX R,G,B to L1 Voltage gain AUX R,G,B to R,G,B Voltage gain (LPF OFF) AUX R,G,B to R,G,B Voltage gain (LPF ON) Difference voltage gain Between the channel CVBS/Y OUT to INPUT AD Maximum output level 0dB CVBS/Y OUT to INPUT AD Maximum output level 2dB CVBS/Y OUT to L1 Maximum output level 6dB CVBS/Y OUT to L1 Maximum output level 8dB CVBS/Y OUT to AUX Maximum output level 6dB CVBS/Y OUT to AUX Maximum output level C OUT to AUX Maximum output level C OUT to AUX Maximum output level 8dB 6dB 8dB GVPS0 GVPS6 GAD0 GAD2 GL1AUX6 GL1AUX8 GAUX6-1 GAUX6-2 GAUX8 GL16-1 GL18-1 GL16-2 GL18-2 GL16-3 GRGB0-1 GRGB0-2 G VAD0 VAD2 VCV-L6 VCV-L8 VCV-A6 VCV-A8 VC-A6 VC-A8 -0.7 5.7 -0.8 1.4 5.5 7.7 5.7 5.5 7.7 5.5 7.7 5.5 7.7 5.7 -0.6 -0.8 -0.5 2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 -0.2 6.2 -0.3 1.9 6.0 8.2 6.2 6.0 8.2 6.0 8.2 6.0 8.2 6.2 -0.1 -0.3 0.0 3.2 3.2 3.2 3.2 3.2 3.2 3.2 3.2 2/16 0.3 6.7 0.2 2.4 6.5 8.7 6.7 6.5 8.7 6.5 8.7 6.5 8.7 6.7 0.4 0.2 0.5 dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vin=1Vpp , f=100kHz Vin=1Vpp , f=100kHz Vin=1Vpp , f=100kHz Vin=800mVpp , f=100kHz Vin=1Vpp , f=100kHz Vin=800mVpp , f=100kHz Vin=450mVpp , f=100kHz Vin=450mVpp , f=100kHz Vin=360mVpp , f=100kHz Vin=450mVpp , f=100kHz Vin=360mVpp , f=100kHz Vin=450mVpp , f=100kHz Vin=360mVpp , f=100kHz Vin=700mV , f=100kHz Vin=560mV , f=100kHz Vin=560mV , f=100kHz Vin=1.0Vpp,f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz ICC IDD ICCST IDDST 85 4.6 10 3.5 130 7.2 15 5.5 175 9.8 20 7.5 mA mA mA mA Load 75 Resistor Load 75 Resistor Symbol MIN. Limit TYP. MAX. Unit Conditions
Item R/C OUT to L1 Maximum output level 6dB R/C OUT to L1 Maximum output level 8dB G OUT to L1 Maximum output level 6dB G OUT to L1 Maximum output level 8dB B OUT to L1 Maximum output level 6dB B OUT to L1 Maximum output level 8dB R Maximum output level G Maximum output level B Maximum output level For VPS, PDC Maximum output level 0dB For VPS, PDC Maximum output level 6dB CVBS/Y OUT to INPUT AD Frequency characteristic 0dB CVBS/Y OUT to INPUT AD Frequency characteristic 2dB CVBS/Y OUT to L1 Frequency characteristic 6dB CVBS/Y OUT to L1 Frequency characteristic 8dB CVBS/Y OUT to AUX Frequency characteristic 6dB CVBS/Y OUT to AUX Frequency characteristic 8dB C OUT to AUX Frequency characteristic 6dB C OUT to AUX Frequency characteristic 8dB R/C OUT to L1 Frequency characteristic 6dB R/C OUT to L1 Frequency characteristic 8dB G OUT to L1 Frequency characteristic 6dB G OUT to L1 Frequency characteristic 8dB B OUT to L1 Frequency characteristic 6dB B OUT to L1 Frequency characteristic 8dB R Frequency characteristic G Frequency characteristic B Frequency characteristic CVBS/Y OUT LPF ON Frequency characteristic CVBS/Y OUT LPF ON Frequency characteristic C-R/C-G-B OUT LPF ON Frequency characteristic C-R/C-G-B OUT LPF ON Frequency characteristic 1 2 1 2
Symbol VRC-L6 VRC-L8 VG-L6 VG-L8 VB-L6 VB-L8 VR VG VB VVPS0 VVPS6 FAD0 FAD2 FCV-L6 FCV-L8 FCV-AU6 FCV-AU8 FC-A6 FC-A8 FRC-L6 FRC-L8 FG-L6 FG-L8 FB-L6 FB-L8 FR FG FB FCV-LPF1 FCV-LPF2 FCR-LPF1 FCR-LPF2
Limit MIN. 2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.0 -1.5 TYP. 3.2 3.2 3.2 3.2 3.2 3.2 3.2 3.2 3.2 3.2 3.2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -0.5 -38 -1.5 -0.5 -38 3/16 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 0.5 -27 0.5 -27 MAX.
Unit Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p Vp-p V V V V dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB
Conditions Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin: THD=1.0% f=100kHz Vin=1Vpp , f=100k/7MHz Vin=800mVpp , f=100k/7MHz Vin=1Vpp , f=100k/7MHz Vin=800mVpp , f=100k/7MHz Vin=1Vpp , f=100k/7MHz Vin=800mVpp , f=100k/7MHz Vin=450mVpp , f=100k/7MHz Vin=360mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=560mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=560mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=560mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=700mVpp , f=100k/7MHz Vin=1.0Vpp , f=100k/6.75MHz Vin=1.0Vpp , f=100kHz/27MHz Vin=1.0Vpp , f=100k/6.75MHz Vin=1.0Vpp , f=100kHz/27MHz
Item R-G-B LPF ON Frequency characteristic 1 R-G-B LPF ON Frequency characteristic 2 CVBS/Y OUT to INPUT AD MUTE attenuation CVBS/Y OUT to L1 MUTE attenuation CVBS/Y OUT to AUX MUTE attenuation C OUT to AUX MUTE attenuation R/C OUT to L1 MUTE attenuation G OUT to L1 MUTE attenuation B OUT to L1 MUTE attenuation SW1 Switch crosstalk SW2 Switch crosstalk SW3 Switch crosstalk SW4 Switch crosstalk SW5 Switch crosstalk SW7 Switch crosstalk SW8 Switch crosstalk SW10 Switch crosstalk CVBS/Y OUT Between the channel crosstalk C-R/C-G-B OUT Between the channel crosstalk R-G-B Between the channel crosstalk BIAS input impedance BIAS input impedance AUX R/C terminal Scart connector part FB threshold L1 FB OUT Output voltage H L1 FB OUT Output voltage L FSW Output voltage H FSW Output voltage L ADR Input voltage H Input voltage L Input impedance
Symbol FRGB1 FRGB2 MAD ML1 MAUX MC MRC MG MB CSW1 CSW2 CSW3 CSW4 CSW5 CSW7 CSW8 CSW10 CCVBS CCR/CGB CRGB RBIAS RRC
Limit MIN. -3 TYP. 0 -15 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 -60 14 100 20 150 MAX. 1 -1.5 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 -55 26 200
Unit dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB k k
Conditions Vin=700mVpp , f=100kHz/6MHz Vin=700mVpp , (f=100kHz/14.3MHz) Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz Vin=1.0Vpp , f=4.43MHz AMP0dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz AMP0,6dB Vin=1.0Vpp , f=4.43MHz AMP6dB Vin=1.0Vpp , f=4.43MHz
VFB VFB-HI VFB-L0 VFSW-HI VFSW-LOW
0.4 3.6 0 VCC -0.5 0
0.7 4
0.9 4.4 0.7
V V V V V RL=150 RL=150 No load No load
VCC -0.1
VCC 0.7
VADR-HI VADR-LOW RADR
2.0 0 65 100 4/16
VCC 1.0 135
V V k Pull down resister
Item SCL, SDA Input voltage H Input voltage L Input bias current INT Output voltage H INT Output voltage L ALL MUTE threshold FS1, FS2 Input threshold H FS1, FS2 Input threshold L PARALLEL 1~4 Output voltage H PARALLEL 1~4 Output voltage L ASW1~4 Output voltage H ASW1~4 Output voltage L FSL1, FSAUX Output voltage H FSL1, FSAUX Output voltage M FSL1, FSAUX Output voltage L
Guaranteed design parameters
Symbol
Limit MIN. TYP. MAX.
Unit
Conditions
V V V
C-HI
2.0 0 0 Vcc -0.5 0 1.0 2.5 0.83 Vcc -0.5 0 3.5 0 4.0 2.0 0 -1 Vcc-0.1 0.3 1.5 2.75 1.08 Vcc -0.1 0.3 VCC0.1 0.1 0.95 xVcc 2.5 0.1
VCC 1.0 -10 Vcc 0.5 2.0 3 1.33 Vcc 0.5 VCC 1.0 VCC 3.0 0.75
V V A V V V V V V V V V V V V Pull up 100k Iload=1mA The span that input is possible. 0 VCC Maximum input voltage VCC (VCC 5%) Minimum input voltage 0V (VCC 5%) Pull up 100k Iload=1mA No load No load RL=200k RL=200k RL=200k
C-LOW
C-BIAS
VINT-HI VINT-LOW VMUTE VFS-H VFS-L VOPH VOPL VOSH VOSL VOFSH VOFSM VOFSL
SW part L1,AUX CVBS/Y For VPS,PDC 0dB Differential Gain L1,AUX CVBS/Y For VPS,PDC 6dB Differential Gain ENC CVBS,ENC Y to INPUT AD 0dB Differential Gain ENC CVBS,ENC Y to INPUT AD 2dB Differential Gain ENC CVBS,ENC Y to L1&AUX 6dB Differential Gain ENC CVBS,ENC Y to L1&AUX 8dB Differential Gain L1C to AUX 6dB Differential Gain ENC C to AUX 6dB Differential Gain ENC C to AUX 8dB Differential Gain ENC C to L1 6dB Differential Gain ENC C to L1 8dB Differential Gain ENC R,G,B to L1 6dB Differential Gain ENC R,G,B to L1 8dB Differential Gain AUX R,G,B to L1 Differential Gain DGVPS0 DGVPS6 DGAD0 DGAD2 DGL1AU6 DGL1AU8 DGLCAUX DGC-A6 DGC-A8 DGC-L6 DGC-L8 DGRGBL6 DGRGBL8 DGAUX-L 0.1 0.1 0.1 0.1 0.5 0.5 1.0 1.0 1.0 1.0 1.0 0.8 0.8 0.2 5/16 % % % % % % % % % % % % % % 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output
Item AUX R,G,B R,G,B Differential Gain L1,AUX CVBS/Y For VPS,PDC 0dB Differential Phase L1,AUX CVBS/Y For VPS,PDC 6dB Differential Phase ENC CVBS,ENC Y to INPUT AD 6dB Differential Phase ENC CVBS,ENC Y to INPUT AD 8dB Differential Phase ENC CVBS,ENC Y to L1&AUX 6dB Differential Phase ENC CVBS,ENC Y to L1&AUX 8dB Differential Phase L1 C to AUX 6dB Differential Phase ENC C to AUX 6dB Differential Phase ENC C to AUX 8dB Differential Phase ENC C to L1 6dB Differential Phase ENC C to L1 8dB Differential Phase ENC R,G,B to L1 6dB Differential Phase ENC R,G,B to L1 8dB Differential Phase AUX R,G,B to L1 Differential Phase AUX R,G,B to R,G,B Differential Phase L1,AUX CVBS/Y For VPS,PDC 0dB S/N ratio L1,AUX CVBS/Y For VPS,PDC 6dB S/N ratio ENC CVBS,ENC Y to INPUT AD 0dB S/N ratio ENC CVBS,ENC Y to INPUT AD 2dB S/N ratio ENC CVBS,ENC Y to L1&AUX 6dB S/N ratio ENC CVBS,ENC Y to L1&AUX 8dB S/N ratio L1 C ENC C ENC C ENC C ENC C to AUX to AUX to AUX to L1 to L1 6dB S/N ratio 6dB S/N ratio 8dB S/N ratio 6dB S/N ratio 8dB S/N ratio
Symbol DGAURB DPVPS0 DPVPS6 DPAD6 DPAD8 DPL1AU6 DPL1AU8 DPLCAU6 DPC-A6 DPC-A8 DPC-L6 DPC-L8 DPRGBL6 DPRGBL8 DPAUX-L DPAURB SNVPS0 SNVPS6 SNAD0 SNAD2 SNL1AU6 SNL1AU8 SNLCAU6 SNC-A6 SNC-A8 SNC-L6 SNC-L8 SNRGBL6 SNRGBL8 SNAUX-L SNAURB
Limit MIN. TYP. 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.4 0.4 0.4 0.4 0.2 0.2 0.2 0.2 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 -70 6/16 MAX. -
Unit % deg deg deg deg deg deg deg deg deg deg deg deg deg deg deg dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB
Conditions 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output 75 terminating. 1Vpp output Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal Standard 100% white signal
ENC R,G,B ENC R,G,B AUX R,G,B AUX R,G,B
to L16dB S/N ratio to L18dB S/N ratio to L1 S/N ratio to R,G,B S/N ratio
Block diagram
B CLAMP B CLAMP B CLAMP
SW10
1 2 3
L1 CVBS/Y AUX CVBS/Y TU CVBS/Y ENC CVBS ENC Y
1 2 3 4 5
SW1
MUTE AUX CVBS/Y 1 ENC CVBS 2 ENC Y 3 MUTE L1 CVBS/Y TU CVBS/Y ENC CVBS ENC Y 1 2 3 4 SW3 SW2
B CLAMP B CLAMP
LPF LPF
MUTE
BIAS BIAS
LPF
1 2 MUTE
SW4
1
B CLAMP B CLAMP/BIAS B CLAMP B CLAMP B CLAMP B CLAMP
SW5
LPF
2
1 2
SW6 MUTE SW7 MUTE SW8 MUTE
LPF
1 2
LPF
1 2
SW11
LPF
LPF
LPF
1 4V 2 0V 3
SW9
FS IN MONI INT
I C BUS
2
REF
Fig.1 Blocks inside the dotted line operate at a standby mode.
7/16
Equivalent circuit
Pin No. Pin name (Input/Output) Function Equivalent circuit No used INPUT range (V) Terminal voltage (V)
1. 19. 39.
DGND GND2 GND1
GND terminal
0
2. 6. 8. 10. 12. 24. 38. 42. 44. 48.
ENCY ENCR ENCG ENCB TV CVBS/Y L1 CVBS/Y AUX CVBS/Y AUX G AUX B L1 C
Signal input terminal The video signal input pins is a bottom clamp. 1.4
Signal input terminal 4. 26. ENC C L1 C The video signal input pins is a resistance bias. 2.9
Signal input terminal 40. AUX R/C AUX R input can be a bottom clamp or resistance bias. 1.4
14. 16. 18. 20. 22. 28. 29. 30. 32. 34.
CVBS/Y OUT to INPUT AD for VPS PDC R G B B OUT to L1 G OUT to L1 R/C OUT to L1 CVBS/Y OUT to AUX C OUT to AUX
S-Video signal input distinction terminal 0.7 The state of each pin can be 2 read by I C-BUS.
Signal output terminal 75 driver output pin gain can be selected 6/8dB by 2 I C-BUS.
0.7 2.1
Signal output terminal 50. L1 FB OUT This pin is an output terminal for scart connector. The drive of 75 is possible.
Signal output terminal 52. FSW The input from FB is outputted as is.
Signal input terminal 51. FB The signal from scart connector input.
Reference voltage terminal 9. VREF A capacitor is connected to opposite GND. 2.8
8/16
7. 11. 13. 43.
PARALLEL1 PARALLEL2 PARALLEL3 PARALLEL4
Open collector output terminal It can be set up by I C-BUS.
2
0
LOW 15. 17. 21. 23. ASW4 ASW3 ASW2 ASW1 BD3825FS control terminal 0 The signal which switches SW of BD3825FS is output. It 2 can be set by I C-BUS. HI 5
FS output terminal 3. 5. FS AUX FS L1 Controls the FS output of BD3825FS. 2 It can be set up by I C-BUS. 0
TEST control terminal 37. TEST1 Short to GND. 0
ALL MUTE control terminal 41. ALL MUTE It can set all 75 driver outputs to mute mode. 5
ADR control terminal 5. ADR Pin to set slave address which is 90H(91H) or 92H(93H). 0
FS monitor terminal 27. 31. FS1 FS2 It acts as the monitor for the FS change.
I C-BUS Clock input terminal 46. SCL The pin is an input clock of 2 I C-BUS. It uses a resistor to pull up.
2
I C-BUS Data input terminal 47. SDA The pin is data of the 2 I C-BUS. It uses a resistor to pull up.
2
INT terminal 45. INT When INT terminal changes FS pin, it outputs HiZ. 0
9/16
Description of operations
2 I C-BUS Control input specifications
I2C -BUS Format (WRITE MODE) SLAVE S A DATA1 A ADDRESS
DATA2
A
DATA3
A
DATA4
A
DATA5
A
DATA6
A
P
S : Start Condition A : Acknowledge P: Stop Condition b7 Slave address DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 1 b6 0 ADSW CAUVSW b5 0 RSW b4 1 L1SW b3 0 GBSW b2 0 b1 ADR b0 R/W
YAUXSW LASW CL/BI CRSW FBSW AMP0/6 AMP6/8 FILTERSW # SEL INT_EN OUTCTL1 OUTCTL2 Standby # # # # PARALLEL1 PARALLEL2 PARALLEL3 PARALLEL4 ASW1 ASW2 ASW3 ASW4 FSL FSA # # # # # Don't Care When the power is turned on, the condition is as marked *.
Explanation The slave address configured with the ADR terminal (write mode). 0 : When ADR terminal input is L. Address becomes "90H". 1 : When ADR terminal input is H. Address becomes "92H".
Explanation SW3 input select. A signal to output in "CVBS/Y to AUX", select. 000 :L1 CVBS/Y * 001 :TU CVBS/Y 010 : ENC CVBS 011 : ENC Y 1XX : MUTE SW4 input select. A signal to output in "C OUT to AUX", select. 00 : L1 C * 01 : ENC C 1X : MUTE
ADR
YAUXSW
R/W
READ/WRITE mode setting 0 : WRITE 1 : READ
CAUXSW
ADSW
SW1 input select. A signal to output in "CVBS/Y to INPUT AD", select. 000 : L1 CVBS/Y 001 : AUX CVBS/Y * 010 : TU CYBS/Y 011 : ENC CVBS 100 : ENC Y 101 : MUTE 110 : MUTE 111 : MUTE SW6 input select. A signal to output in "R/C OUT to L1", select. 00 : ENC C or ENC R 01 : AUX R/C * 1X : MUTE A signal to input in RSW (SW5), select. 0 : ENC C * 1 : ENC for VPS PDC terminal AMP gain configuration. 0 : 0dB * 1 : 6dB The output configuration of the PARALLEL terminal. 0 : Low * 1 : Hi 10/16
L1SW
SW2 input select. A signal to output in "CVBS/Y to L1", select. 00 : AUX CVBS/Y * 01 : ENC CVBS 10 : ENC Y 11 : MUTE
RSW
GBSW
CRSW
FBSW
AMP0/6
CL/BI SEL
SW7, SW8 input selects. Signals to output in "G OUT to L1" and "B OUT to L1", select. 00 : ENC G ENC B 01 : AUX G AUX B * 1X : MUTE The output of L1 FB OUT, select. 0X : FB (Through)* 10 : 0V 11 : 4V The configuration of AUX R/C input mode. 0 : B CLAMP * 1 : BIAS
PARALLEL 14
LASW
SW10 input select. A signal to output in "for VPS, PDC", select. 00 : AUX CVBS/Y * 01 : L1 CVBS/Y 1X : TU CVBS/Y When encoder input is chosen, the gain of AMP is configured. (Encoder input terminal :ENC CVBS, ENC Y, ENC C, ENC R, ENC G, ENC B) 0: 6dB 0dB * 1: 8dB 2dB Caution : As for "CVBS/Y OUT to INPUT AD", it is 0/2 dB switchover. "C OUT to AUX" output control. 0 : Normal * 1 : HI Z normal/standby mode configuration. 0 : Normal * 1 : Standby Caution : Block diagram is referred for the actuation block at the time of Standby. The output configuration of the FSL1. 00 : input mode * 01 : Low 10 : MID 11 : HI Caution : When input mode, the output of BD3825FS becomes HiZ(Low).
INT_EN
INT signal output control. 0 : Enable * 1 : Disable Caution: When Enable Disable change, INT signal is cleared. SW11 input select. Select the R, G and B each output signal are outputted through the filter, or not outputted through the filter. 0: There is no filter. * 1: There is a filter. "B OUT to L1" output control. 0 : Normal * 1 : HI Z The output configuration of the ASW terminal. 0 : Low 1 : Hi (Initial condition) ASW1:H ASW 2:L ASW 3:L ASW 4:H * The output configuration of the FSAUX. 00 : input mode * 01 : Low 10 : MID 11 : HI Caution : When input mode, the output of BD3825FS becomes HiZ(Low).
AMP6/8
FILTERSW
OUTCTL
OUTCTL2
Standby
ASW 1 4
FSL
FSA
2 I C-BUS format (READ MODE) SLAVE S A DATA1 A/N DATA2 ADDRESS
A/N
DATA3
A/N
DATA4
A/N
DATA5
A/N
DATA6
A/N
P
S : Start Condition A/N : NO acknowledge b7 Slave address DATA1 DATA2 1 b6 0 ADSW CAUVSW b5 0 RSW b4 1
P: Stop Condition b3 0 b2 0 GBSW b1 ADR b0 R/W
YAUXSW LASW CL/BI DATA3 CRSW FBSW AMP0/6 AMP6/8 FILTERSW HI SEL DATA4 INT_EN OUTCTL1 OUTCTL2 Standby HI HI HI HI DATA5 PARALLEL1 PARALLEL2 PARALLEL3 PARALLEL4 ASW1 ASW2 ASW3 ASW4 DATA6 FSL FSA FS1 FS2 # Don't Care In the read mode, 00h is output from DATA4 after power-on is reset to 09h. If a write movement occurs once, it is set to normal mode.
L1SW
11/16
Explanation The slave address configured with the ADR terminal. (read mode) 0 : When ADR terminal input is L. Address becomes "91H". 1 : When ADR terminal input is H. Address becomes "93H".
Explanation
ADR
R/W
READ/WRITE mode setting 0 : WRITE 1 : READ
FS1
The state of FS1 is outputted. 00 : Low 10 : MID 11 : HI
FS2
The state of FS2 is outputted. 00 : Low 10 : MID 11 : HI
INT signal (45pin) An INT signal outputs HI (high impedance) when the state of FS1, FS2 is monitored by I2C-BUS for transition stage, during input mode configuration. Mode Monitor FS1 Input mode Input mode Others Others FS2 Input mode Others Input mode Others Both Only FS1 Only FS2 No monitoring
INT signal clearance occurs every time the read (read mode) of the data with I2C-BUS when slave address is sent. INT signal output control It can be controlled with I2C-BUS. INT signal is cleared at switching by Enable Disable. Standby mode Standby mode can be configured by I2C-BUS. Only the section marked in the dotted line, in the Figure 3, Block Diagram, is active during standby state. All others are off. ALL MUTE CVBS/Y, C, R/C, G, B output (14pin 29pin 30pin 31pin 32pin 34pin 36pin) are all muted. Mute controls each output separately by I2C-BUS. ALL MUTE H L Mode Normal Mute
The bias of an AUX R/C As for CLAMP/BIAS change of AUX R/C (40pin), the output bias of R/C OUT to L1 (30pin) is synchronized. Setup "CL/BI SEL" by the I2C-BUS control, in accordance with the bias method of the input chosen when input from ENC C (4pin) and ENC R (6pin) is output.
12/16
Reference data
150
DD[mA]
10
20
CCSTBY[mA]
CC[mA]
8
15
SUPPLY CURRENT : I
SUPPLY CURRENT : I
100
6
4
50
SUPPLY CURRENT : I
10
5
2
0 4.4 4.6 4.8 5.0 VCC [V] 5.2 5.4 5.6
0 4.4 4.6 4.8 5.0 5.2 VDD [V] 5.4 5.6
0 4.4 4.6 4.8 5.0 5.2 VCC [V] 5.4 5.6
Fig.2 VCC Circuit Current (Supply voltage dependence)
150 [mA]
Fig.3 VDD Circuit Current (Supply voltage dependence)
10
CCSTBY[mA]
Fig.4 VCC Circuit Current (Standby) (Supply voltage dependence)
20
[mA]
8
CC
SUPPLY CURRENT : I
SUPPLY CURRENT : I
100
DD
15
SUPPLY CURRENT : I
6
10
4
50
2
5
0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
0 -50 -25 0 25 50 75 TEMPERATURE [ ] 100
0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
Fig.5 VCC Circuit Current (Temperature dependence)
10 0 -10 GAIN [dB] -20 180
Fig.6 VDD Circuit Current (Temperature dependence)
10 0
5.25V
Fig.7 VCC Circuit Current (Standby) (Temperature dependence)
10 0 GAIN
5.25V
180 135 90 45 0 PHASE PHASE [deg]
GAIN
5.25V 5.0V 4.75V
135 90
GAIN [dB]
GAIN [dB]
45 0
PHASE [deg]
-10 -20 -30 -40 -50 10E+04 1E+06
5.0V 4.75V
-10 -20 -30 -40 -50
10E+06 1E+08
5.0V 4.75V
PHASE
-30 -40 -50 10E+04 1E+06 10E+06 FREQUENCY [Hz] -45 -90
-45 -90
-135 -180 1E+08
-135 -180 1E+06 10E+06 1E+08 FREQUENCY [Hz]
10E+04
FREQUENCY [Hz]
Fig.8 Frequency Characteristics CVBS/Y OUT to L1
10 0 -10 GAIN [dB] -20 180
Fig.9 Frequency Characteristics CVBS/Y OUT to L1 (with LPF)
10 0
100C
Fig.10 Frequency Characteristics G
10 0 GAIN
100C
180 135 90
PHASE [deg]
GAIN
100C 25C -50C
135 90 PHASE [deg]
GAIN [dB]
GAIN [dB]
45 0
-10 -20 -30 -40 -50 100E+03
25C -50C
-10 -20 PHASE -30 -40 -50 10E+04
25C -50C
45 0 -45 -90
PHASE
-30 -40 -50 10E+04 1E+06 10E+06 FREQUENCY [Hz]
-45 -90
-135 -180 1E+08
-135 -180 1E+06 10E+06 FREQUENCY [Hz] 1E+08
01E+06 010E+06 FREQUENCY [Hz]
100E+06
Fig.11 Frequency Characteristics CVBS/Y OUT to L1
Fig12 Frequency Characteristics CVBS/Y OUT to L1 (with LPF)
Fig.13 Frequency Characteristics G
13/16
10
5.25V
10
5.0V 4.75V
0
100C 25C -50C
CVBS/Y OUT to L1 -20
0 -10 GAIN [dB] -20 -30 -40 -50 10E+04 1E+06 10E+06 FREQUENCY [Hz]
0 -10 GAIN [dB] -20 -30 -40 -50 1E+08 10E+04 1E+06 10E+06 FREQUENCY [Hz]
GAIN [dB]
-40
-60
-80
-100
1E+08
-50
-25
0
25
50
75
100
TEMPERATURE [ ]
Fig.14 Frequency Characteristics G (with LPF)
5 MAXIMUM OUTPUT VOLTAGE :Vomax [Vpp]
MAXIMUM OUTPUT VOLTAGE :Vomax [Vpp]
Fig.15 Frequency Characteristics G (with LPF)
5
3.0
Fig.16 MUTE Attenuation (Temperature dependence)
CVBS/Y OUT to L1 4 6dB 3 8dB
G 4 LPF OFF
DIFFERENTIAL GAIN : DG [%]
2.0 CVBS/Y OUT to L1
3
LPF ON
2
2
1.0 G
1
1
0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
0.0 4.4 4.6 4.8 5.0 5.2 VCC [V] 5.4 5.6
Fig.17 Maximum Output Level CVBS/Y OUT to L1
Fig.18 Maximum Output Level G
Fig.19 Differential Gain (Supply voltage dependence)
3.0 DIFFERENTIAL PHASE : DP [deg.] DIFFERENTIAL GAIN : DG [%]
1.0
DIFFERENTIAL PHASE : DP [deg.]
1.0
0.8
0.8
2.0
0.6
G CVBS/Y OUT to L1
0.6
CVBS/Y OUT to L1 1.0 G
0.4
0.4
G
0.2
0.2
CVBS/Y OUT to L1
0.0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
0.0 4.4 4.6 4.8 5.0 5.2 VCC [V] 5.4 5.6
0.0 -50 -25 0 25 50 75 100 TEMPERATURE [ ]
Fig.20 Differential Gain (Temperature dependence)
0
50
Fig.21 Differential Phase (Supply voltage dependence)
200
Fig.22 Differential Phase (Temperature dependence)
-20
IMPEDANCE [k ]
40 IMPEDANCE [k ] -50 -25 0 25 50 TEMPERATURE [ ] 75 100
150
S/N [dB]
-40
30
100
-60
20
G
-80
10
CVBS/Y OUT to L1
50
0
-100 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
0 -50 -25 0 25 50 TEMPERATURE [ ] 75 100
Fig.23 S/N ratio (Temperature dependence)
Fig.24 BIAS input impedance (Temperature dependence) 14/16
Fig.25 AUX R BIAS input impedance (Temperature dependence)
Cautions on use Numbers and data in entries are representative design values and are not guaranteed values of the items. Although ROHM is confident that the example application circuit reflects the best possible recommendations, be sure to verify circuit characteristics for your particular application. Modification of constants for other externally connected circuits may cause variations in both static and transient characteristics for external components as well as this Rohm IC. Allow for sufficient margins when determining circuit constants. 3. Absolute maximum ratings Use of the IC in excess of absolute maximum ratings, such as the applied voltage or operating temperature range (Topr), may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure, such as a fuse, should be implemented when using the IC at times where the absolute maximum ratings may be exceeded. 4. GND potential Ensure a minimum GND pin potential in all operating conditions. Make sure that no pins are at a voltage below the GND at any time, regardless of whether it is a transient signal or not. 5. Thermal design Perform thermal design, in which there are adequate margins, by taking into account the permissible dissipation (Pd) in actual states of use. 6. Short circuit between terminals and erroneous mounting Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals, GND, or other components on the circuits, can damage the IC. 7. Operation in strong electromagnetic field Using the ICs in a strong electromagnetic field can cause operation malfunction. 8. Operating Voltage Range and Operating Temperature Range The circuit functional operations and electrical characteristics are guaranteed within the Operating Voltage Range and Operating Temperature Range. However, careful consideration must be taken in designing the circuit. 9. Supply voltage of operation Although basic circuit function is guaranteed under normal voltage operation (4.75V 5.25V), ensure each parameter complies with appropriate electrical characteristics, when using this device. 10. The first resistor of 75 driver output must be layout nearest to the IC. 11. The coupling capacitor must be layout nearest to the IC and each pin. 2 12. I C BUS is compatible with fast mode of Version 2.0 but not compatible with Hs mode. Thermal derating characteristics 1. 2.
Fig.26
15/16
Selection of order type
B
H
7
6
2
TYPE
4
K
S
2
BH7624KS2
SQFP-T52

12.0 0.3 10.0 0.2
39 27 26

Container Quantity Direction of feed
0.125 0.1
0.5
Tray(with dry pack) 1000pcs Direction of product is fixed in a tray.
12.0 0.3 10.0 0.2
40
52 1
14 13
1.4 0.1
0.1 0.1
0.65
0.3 0.1 0.15
Unit:mm)
1pin
Orders are available in complete units only.
The contents described herein are correct as of October, 2005 The contents described herein are subject to change without notice. For updates of the latest information, please contact and confirm with ROHM CO.,LTD. Any part of this application note must not be duplicated or copied without our permission. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams and information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. The products described herein utilize silicon as the main material. The products described herein are not designed to be X ray proof.
Published by Application Engineering Group
Catalog NO.05T395Be '05.10 ROHM C 2000 TSU
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of which would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM cannot be held responsible for any damages arising from the use of the products under conditions out of the range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact your nearest sales office.
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Appendix1-Rev2.0

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